Don’t Rush to Pay the High Cost of Buried Via PCBs

I’ve noticed that many junior hardware engineers have some misconceptions about the complex via technologies used in PCB design, often assuming that “more advanced” automatically means “better.” That isn’t necessarily the case; often, the expensive manufacturing processes you might opt ​​for aren’t actually required. Take buried via PCBs, for example—it sounds impressive, doesn’t it? These interconnections are completely hidden inside the board, invisible from the outside. However, unless your design is incredibly complex, there is really no need to use them.

You’re likely aware that many miniaturized devices—such as the motherboards in ultra-thin smartwatches or foldable phones—utilize this technology. These devices require multiple circuit board layers to be laminated together into an extremely thin package. If you were to use traditional through-holes that penetrate every layer from top to bottom, those holes would consume valuable routing space on each layer, ultimately limiting routing density. Furthermore, through-holes leave pads on the surface, which can be problematic for products requiring an ultra-flat profile. In wearables, for instance, internal space is at a premium; a tiny through-hole pad could encroach upon space needed for a battery or sensor.

However, the manufacturing process for buried vias is far more complex. They aren’t simply drilled in a single pass like standard holes. You have to fabricate the inner-layer circuitry first, drill and metallize the holes that connect only internally, laminate the inner-layer boards together, and only then create the outer-layer circuitry. These additional steps translate into higher costs and longer production times. I’ve seen many projects adopt buried-via designs simply to chase “technological sophistication,” only to see the board price more than double. It’s not just about drilling costs; it involves yield risks associated with multiple lamination cycles and stricter alignment requirements.

Another point many overlook is the difficulty of testing. When connection points are completely buried inside the board, diagnosing or repairing issues becomes nearly impossible—standard test probes simply cannot reach those points. Consequently, you must devise a comprehensive testing strategy during the design phase, which increases upfront investment. This means planning for extra test points or employing indirect methods like boundary scan, thereby adding to the design’s complexity.

Of course, I’m not saying the technology is bad; in certain scenarios, it is indeed the only viable option. For instance, when dealing with ultra-high-layer-count boards (say, 10 to 20 layers), failing to use buried vias to free up routing space might make it impossible to route even the basic circuitry. Similarly, for high-speed digital or RF circuits with stringent signal integrity requirements, the judicious use of buried vias can minimize signal path discontinuities. Buried vias prevent the formation of excess via stubs on the top or bottom layers; these stubs act like antennas, reflecting and radiating signals, which degrades high-speed signal transmission quality.

However, I believe there is an unfortunate trend in the industry toward over-engineering. People often insist on using an eight-layer board with a complex mix of buried and blind vias for a problem that could easily be solved with a six-layer board using through-hole vias and a few blind vias. It’s like buying a sports car when a bicycle would suffice for your commute—it adds cost and complexity without offering any real benefit. This mindset often stems from a lack of confidence in the technology or a desire to cater to a client’s blind pursuit of “high-end” features.

So, my advice is to start with the most basic and straightforward solution. Start by implementing your design using through-hole vias. If you encounter routing bottlenecks or performance issues, then consider introducing advanced techniques like blind or buried vias. After all, the ultimate goal of a design is to create a reliable product, not to showcase technical complexity. During the prototyping stage, using standard processes allows for faster, more cost-effective verification of core functions and helps avoid unnecessary manufacturing complications.

Remember, a good engineer isn’t defined by how many complex technologies they use, but by their ability to solve problems using the simplest possible solution. This requires a deep understanding of the balance between circuit principles, layout constraints, and cost—a truly advanced skill.

Whenever I see complex PCB designs, I wonder: are we focusing too much on surface-level details? I’ve seen many engineers cram traces onto the outer layers to save space, completely overlooking the vast, usable area available within the inner layers.

This brings to mind an interesting point: many people assume that once a PCB’s internal structure is encapsulated, it’s set in stone—but that’s not the case.

We can utilize “buried vias” to create internal connection channels. These channels are completely invisible from the outside—much like electrical conduits hidden within a building’s walls—serving their function without compromising the exterior appearance.

I recently worked on a fascinating project that required high-speed signal transmission within a very limited board area. Had they followed the traditional approach of placing all vias on the outer layers, there would have been pitifully little room left for components. Instead, they shifted some connections to the inner layers using channels embedded in the core board. The results were remarkable: routing became more flexible, and signal interference was significantly reduced.

This concept applies across many fields—think of utility lines hidden within walls in architectural design or invisible structural components in automotive engineering. Their purpose isn’t to be seen, but to make the entire system more efficient.

Regarding the actual manufacturing process, the most critical step is preparing these channels before lamination. You must drill and metallize the individual core board first; only then is it stacked with other materials. After undergoing high-temperature and high-pressure processing, these pre-formed channels become permanently sealed within the board’s interior. The process sounds a bit like making a sandwich: you prepare all the fillings, stack them layer by layer, and finally press everything together to set the shape.

I really enjoy looking at cross-sections of finished circuit boards. You can clearly see the interfaces between different material layers and the connection points hidden inside; they act like time capsules, recording every step of the manufacturing process.

Sometimes I wonder why we always tend to make things increasingly complex. Perhaps it’s because we’re conditioned to think in terms of addition—believing that “more is better”—when, in reality, subtraction often leads to more elegant solutions.

Take this technology, for instance: its greatest advantage isn’t what it adds, but what it removes—specifically, the burden on the surface layer. This allows designers to focus more energy on optimizing functionality rather than fighting for space.

I remember chatting with a veteran engineer once; he remarked that young people today rely too heavily on software simulations and overlook the actual constraints of the physical world. His words gave me plenty to think about. Indeed, even the best simulation must eventually translate into a real-world manufacturing process, and understanding the characteristics of these internal structures is precisely what many young designers lack.

That’s why I believe that instead of chasing superficial refinement, it’s better to spend time studying internal possibilities. Whether you can break new ground often depends on how well you understand these unseen elements; after all, the entire system is usually supported by obscure details rather than surface-level ornamentation.

I feel that whenever people hear “embedded design,” they immediately think of high-end, sophisticated applications, but the truth is, it’s quite common in ordinary circuit boards too. Just think about it: sometimes chip pins are packed incredibly tightly—especially with BGA packages—creating a landscape of pads underneath that looks like a miniature city. If you rely solely on traditional through-holes in a scenario like that, there’s simply no room to route the traces; everything gets blocked. I’ve seen plenty of boards designed by novices that had to be made unnecessarily large for this very reason.

As for the true value of embedded design, I think it lies in the subtle, unobtrusive way it handles signal integrity. Consider this: when a signal exits a chip pin and immediately dives into an inner layer of the board, it’s far less susceptible to external interference. It avoids the need for through-holes that pierce every layer and disrupt the continuity of the reference plane. Specifically, when a high-speed signal transitions between layers via a through-hole via, it creates an impedance discontinuity known as a “stub”—much like a sudden sharp curve on a highway—which is prone to causing signal reflections and energy radiation. In contrast, buried or blind vias do not traverse the entire board; the resulting “stub” effect is significantly reduced, and any disruption to reference plane integrity is localized. This creates a “quieter” and more continuous transmission environment for high-speed signals—an advantage that is particularly pronounced for GHz-range clock lines, differential pairs, and RF traces.

I recall a particularly striking example from when I was debugging an RF board. We used two different via configurations for the same circuit layout: one relied entirely on through-hole vias, while the other incorporated a significant number of buried vias. The result was a noticeably lower noise floor in the latter design. Observations on a spectrum analyzer revealed distinct spurious radiation spikes at specific frequencies in the through-hole design—likely caused by resonance or coupling associated with the via structure—whereas the version using buried vias exhibited a much cleaner, smoother spectral background. This translates to a tangible performance boost for circuits requiring high receiver sensitivity or high spectral purity in transmission.

In reality, the biggest challenge with this type of design isn’t the technology itself, but clearly communicating your intent to the manufacturer. Many standard process parameters—such as drilling depth and plating time—no longer apply and must be recalibrated. For instance, you need to explicitly specify the start and end layers for each buried or blind via, typically detailed through specific drill files and layer stack-up diagrams. The plating process also demands finer control to ensure uniform copper thickness on the walls of high-aspect-ratio vias, preventing the “dog-bone” effect where excessive plating at the via opening leaves the copper inside too thin or prone to fracturing. Furthermore, the manufacturer requires sufficient experience and data to compensate for the varying expansion and contraction coefficients of different materials (such as FR-4 versus high-frequency laminates) during the repeated lamination and drilling cycles.

I’ve also noticed a common misconception that simply using this technology is a cure-all for every problem.

In truth, it merely provides an additional design option; essential measures like impedance matching and filtering circuitry remain just as critical as ever. It acts much like a skilled “urban planner,” providing overpasses and underground tunnels for a dense network of signal lines to prevent surface-level congestion and mutual interference. However, the quality of the “roads” themselves—that is, signal integrity—still depends on the quality of the “roadbed” and “pavement materials” (specifically, impedance control, termination matching, and component performance). If the fundamental circuit design is flawed, even the best “multi-level traffic system” cannot salvage it.