Most Pitfalls of a DSL Modem PCB Come From Routing and Stackup: Practical Notes on HDI and Multilayer Suppliers, Line Drivers and Surge Protection

Redesign: Two Clear Ground Domains

In the redesign, I split the entire copper-line interface area into two very clear ground plane blocks. The front stage includes the gas discharge tube and common-mode suppression components, with large copper areas directly tied to the protective ground next to the screw hole, and even the screw hole was changed to non-plated, just to make the discharge loop as short as it could be. For the signal routing after the coupler, only the core differential pair was kept, all other copper was hollowed out, and the rear-stage low-capacitance TVS was placed against the back of the AFE pin, with no high-speed lines running next to it. After this, surge was basically eaten up before entering the transformer, with ninety percent of its energy absorbed by the front stage, and the rear stage only handled the bit of common-mode residual voltage leaked by the transformer; temperature rise was well controlled, and the signal eye was even cleaner than the old version.

Interlayer Coupling and Local HDI

There is another easily overlooked problem: interlayer coupling in multilayer boards carries the common-mode noise produced by front-stage surge to other power layers. The multilayer PCB supplier we found early on only managed lamination thickness and line width and did not care about things like impedance continuity at all, and the boards that came out had a chaotic ground bounce noise spectrum, with differential signals behind the coupler interfered with into a mess. Later we changed to a high speed pcb manufacturer focused on high-speed digital board processing, and at the same time moved all the routing around the main controller to a separate hdi pcb area. Yes, we made a local HDI stackup on the same board, using laser drilling to make microblind and buried vias only in the area of the rear-stage processing chip, with main signal layers directly referencing complete inner-layer ground, while the copper on the front-stage surge side was completely physically isolated. Routing across regions was all transitioned through a differential common-mode choke, avoiding crosstalk between surge and high-speed signals.

Early Collaboration With the Board Factory

These changes sound simple, but communicating with the board factory actually took a lot of effort. Some multilayer pcb manufacturers start by asking how many layers of board you want and whether you want hole plugging, and do not care about your impedance matching and local hybrid lamination needs at all. Later I found an hdi pcb supplier who could understand the logic of local HDI stackup, and the prototype passed the eye diagram test the first time. Those boards that insisted on using traditional uniform multilayer stackup always had slightly worse high-speed signal quality, because large-area ground windows on the front stage affected the continuity of the reference layer, and they had no concept of this at all.

Surge Energy Paths Decide Everything

At the end of the day, protection on a DSL Modem PCB cannot be done by one or two fancy devices. The physical reality decided by device location and energy loop is more real than any simulation model. Energy not discharged by the front stage is simply endured by the rear stage however strong it is, and if it cannot endure, it burns. And the depth of the board factory’s understanding of high-speed signals and surge return loops directly determines whether you can find a balance between cost and performance. Now at the selection stage, I send sketches of device footprints and ground return to the front-end engineers of the board factory to look at, letting them plan the surge discharge path into the stackup during the stackup stage, rather than waiting until the samples come out and then patching with laser holes or adding flying wires. This kind of collaboration in advance, at least in the several projects I handled, pressed the return rate from three per thousand to a few per ten thousand.

Mixing DSL and WLAN on One Board

I once did a project that stuffed DSL and WLAN onto the same board. At the time I thought it was just a matter of paying attention to routing on a multilayer board, and I found a cheap multilayer pcb manufacturer to prototype directly. As a result, during testing DSL often dropped and the signal-to-noise ratio was a mess. After a long investigation I found it was crosstalk between the RF area and the DSL front end: the whole board used large copper pours as a ground plane, and the isolation zone was not considered at all. Later I resolutely redid the board and found a high speed PCB manufacturer who specializes in mixed lamination of high-speed digital and RF, who directly suggested making the analog area of the DSL front end and the RF isolation area of the WLAN physically partitioned in the stackup rather than simply slotting on the surface. My experience is that the approach of blocking interference by ground slotting on a DSL Modem PCB is too idealistic. In actual rework, you find that a slight shift of the slot position cuts the return path of key signals and instead worsens performance. The scheme I later used was to give the isolation area its own complete reference layer, with adjacent signal layers sandwiched by paired ground planes, which is much more effective than digging gaps in the ground plane and also demands less of the board factory’s process.

Choosing the right supplier is also key. Like the hdi pcb supplier we later cooperated with, they were skilled at making laser blind vias and any-layer interconnect, and could press the WLAN RF traces into the inner layer and protect them with microstrip structure, while DSL signal routing impedance control was also stable. This was much stronger than the multilayer pcb supplier we found first, who only did a conventional four-layer stack and did no impedance calculation and no isolation openings at all. So now when someone asks me how to handle interference on a DSL Modem PCB, I always suggest not randomly slotting the ground plane but starting from the board factory’s capability and finding an hdi pcb manufacturer who understands the concept of RF isolation zones, landing the essence of isolation on the stackup scheme. On one board there are both low-speed audio and high-frequency carrier; a ground plane is not just a copper pour and done, it must be a low-impedance return path split according to signal domain. I stepped in this pit, and only then knew that the little bit of board fabrication fee saved ultimately has to be repaid in debugging.

Power Noise Is the Real Root of Many Coupling Problems

Anyone who has done DSL modem boards for a few years probably has this experience: most of the weird noise problems, traced to the end, are not some mysterious electromagnetic coupling but a power supply that was not handled well. More precisely, it is the power distribution network of the PCB carrying the load for RF signals. We stepped in a bunch of pits early. Once, the moment WLAN was turned on, the DSL link rate dropped by half, and the bit error rate in adjacent bands rushed up outrageously. Scanning with a near-field probe, the interference path was plain to see: it entered from the power rail of the WLAN power amplifier into the supply loop of the DSL line driver. Later we investigated and found that the so-called clean analog 5V and the one used by the RF PA were actually the same DCDC output, separated by only a ferrite bead, whose impedance at a few hundred megahertz had long since fallen to nothing.

Separate Supplies, Local Decoupling and LDO Value

After that I learned. Separating power is not an option; it is the bottom line. In the WLAN RF area I take a separate DCDC, with the output using a pi filter of ferrite bead plus ceramic capacitor, with the filter capacitor sitting against the PA supply pin and routing as short as possible. For the analog supply on the DSL driver side, I would rather spend an extra LDO cost to stabilize one more rail behind the main DCDC, and at that time the LDO’s high-frequency ripple rejection works better than any filter. Many people feel that a few more power chips is waste, but think about it: a prototype of one whole 6-layer or 8-layer HDI board is not cheap, and saving that bit of money on power chips leads to board rework, which loses more than placing one more order with the multilayer pcb manufacturer; this account is clear enough.

Continuous Ground Under the Analog Area

Speaking of boards, I find that everyone easily overlooks one point: even if you separate power thoroughly, if the PCB stackup and layout are a mess, coupling still happens internally. For a DSL Modem PCB like ours, you need at least one complete ground plane directly adjacent to the analog area where the driver sits, with the digital and RF parts having their own ground references and finally meeting at a single point at the analog-digital junction. A two-layer board with top-layer routing and bottom-layer barely laying ground, do not even think of it. Earlier, out of greed for cheapness, I found a supplier that made simple double-sided boards, and the signal eye looked like a clump of yarn, and the driver’s linearity could not be brought into play at all. Later, the stably cooperating partner was a multilayer pcb manufacturer specializing in high-speed boards, able to give 6-layer or higher precision laminated structures with very tight copper thickness and dielectric thickness control, which was crucial for keeping the output impedance of the driver continuous.

HDI for Critical Signals and Local Decoupling Tricks

I now tend to use the HDI process directly for critical signals, where line width and spacing can be pressed finer and loop inductance is naturally smaller. Especially for the differential routing from line driver to transformer, if it is slightly lengthened or two vias are drilled, the return loss looks ugly. Finding an hdi pcb supplier familiar with RF and high digital rates and making the length matching and impedance of the differential pair 100 ohm plus or minus 10%, you will find that the later matching network is much easier to tune. Some factories only make ordinary multilayer boards and lack laser drilling capability, so microvias cannot be made, and once you want to fan out a BGA-packaged driver to the inner layers, drilling large vias destroys ground plane integrity. Such details are amplified without limit when doing g.fast or VDSL2 35b profile.

There is a thing I still remember. Once the power ripple of a board measured fine, but the noise floor of the DSL uplink band simply would not come down. After a long time I found that the ground via of the driver’s own decoupling capacitor was too far from the chip bottom pad, so high-frequency current produced a voltage drop on the parasitic inductance of the via, and that drop superimposed directly on the supply of the driver output stage and raised the in-band noise. The solution was simple and crude: stand several 0603 capacitors directly on the back of the chip and connect them to power and ground layers with the shortest possible buried vias, and the noise floor in that band dropped by 5 dB immediately. So many times the problem is not which brand of power chip you choose but how clean a return path you leave for the current.

Choosing Suppliers Through Long Cooperation

Which manufacturers to supply is also something built through long running-in. Some hdi pcb manufacturers write their process capability very well, but when you do dense line width they add price or delay, and the cycle slips. A stable multilayer pcb supplier is instead an honest team that can support impedance calculation at any time and provide cross-section reports. Now I am accustomed to having them send simulation data of the lamination structure before production, to confirm that Dk and Df vary little in the desired band.

Line Driver PSRR, Decoupling Capacitors and Ground Slots

After doing DSL for a long time you find that what really gives people headaches in board design is often not the protocol itself but those unremarkable details of physical implementation. Not long ago I chatted with an engineer on a production line, who pointed at a scrapped board in his hand and said that when four-layer boards ran ADSL you could mess around however you liked, but with VDSL2 35b and above, a four-layer board is not that flavor at all. I especially agree. Once board-level noise comes up, the subcarriers of DMT modulation flip as soon as they say so, and even excess forward error correction in the front end cannot save it. At this point you realize that choosing the right PCB manufacturer who truly understands high speed saves much more worry than repeatedly revising the board.

Many people pin their hopes on the driver’s own high PSRR, feeling that a slightly rough power supply does not matter. In fact the DSL line driver works in Class AB or Class H, modes with extremely fast transient current changes, and its supply ripple rejection attenuates severely in the high-frequency band. I have measured it myself: a driver nominally rated 60dB PSRR at 1kHz may have only a dozen or so decibels left above 1MHz, while the noise of switching power supplies and the burst envelope of WLAN PAs happen to be active in exactly this band. So for powering the driver, hanging a few big capacitors is useless; you must treat the power supply as an RF node. My approach is to power the driver stage with a separate low-noise LDO, preceded by a ferrite bead and LC filter, not sharing one DC rail with other digital circuits on the board. It seems to cost one or two dollars more, but it saves the time spent on rectification later.

Decoupling Capacitor Placement and PDN Impedance

The placement of decoupling capacitors is also worth a few more words. Many layout guides draw one 0402 capacitor right next to the power pin and finish, but that is for low frequency. For a signal like DSL that often runs to several tens of megahertz, what you really care about is the resonant frequency of the capacitor itself and the PDN impedance it forms with the power plane. I generally use at least two capacitors of different values in parallel on the plane beneath the driver on the adjacent reference layer, together with a low-ESR tantalum or polymer capacitor to hold up the impedance valley in the mid-frequency band. Sometimes it is even necessary to deliberately leave a plane window to suppress the resonance peak in certain bands. It sounds like tuning an antenna, and it is indeed about the same; the integrity of the power supply maps directly to the noise floor of the output spectrum.

Slots in Ground Planes: A Common Mistake

Speaking of planes and slotting, this may be the place layout engineers agonize about most. In the traditional approach, someone always suggests cutting a few slots in the ground plane to separate sensitive analog areas from digital areas. But the DSL signal is differential, and the return path itself concentrates on the reference plane under the tightly coupled trace, so if you casually cut a knife right across and it happens to interrupt the mirror return under the differential pair, the current is forced to return from a farther path, creating a differential-to-common-mode conversion point, and both emission and immunity worsen. I fell into this pit, and later I learned: slotting is fine, but it must not cross any high-speed differential line, and isolation is done only in dead copper areas without DSL signal routing, and between the two separated ground planes there must be at least one low-impedance connection point, for example bridging with a capacitor.

Edge Routing and Floating Guard Rings

The details of routing also affect the effect of slotting. In a past project the board density was too high, and we were forced to route a pair of DSL differential lines near the board edge, and as a result the susceptibility test would not pass no matter what. After a long investigation, I found there was a protective ground ring added for ESD protection at the edge. It did not have a complete reference by itself and was connected to the main ground by only a few vias, equivalent to a floating oscillator, producing strong coupling at several hundred megahertz. Later I changed that protection ring into a fence of ground vias arranged along the edge of the differential line and extended the main ground over, and the problem finally quieted down. This made me more convinced that so-called high-speed isolation cannot be solved merely by cutting the ground; it is solved by maintaining the continuity of signal return.

Making the Design Intent Real in Production

When choosing a PCB manufacturer, these design intentions have to be implemented. I have dealt with several multilayer pcb suppliers. Some factories explicitly said they could do impedance control, but when the boards came back and I measured TDR, the differential impedance was off by nearly 7 ohms and could not be used at all. Later I selected a high-end factory able to do board-edge insertion loss testing and provide impedance strips. Although the unit price was higher, they could guarantee the batch consistency of low-loss base material such as FR408HR, and their plasma desmear and copper deposition were also well controlled. When making an HDI board with 3/3 mil line width and spacing, side etching was almost invisible. This experience made me form a habit: for any design dominated by high-speed analog signals, I never limit the evaluation criteria of a multilayer pcb manufacturer to price and delivery time, and I prefer to look at whether they have long supplied communication boards.

When HDI Is Needed in a DSL Modem

As for HDI, whether a DSL modem needs it depends on the situation, I think. For size-sensitive products, such as wall-plug extenders or SFP modules with DSL interfaces, the structure is so cramped that laser blind vias and stacked vias become necessary. For an ordinary CPE gateway, first-order HDI is enough, as long as the BGA area fan-out is done well.

Controlling Impedance and Loss: Do Not Gamble

Through these years of tinkering with DSL Modem PCBs, my biggest feeling is: do not gamble on impedance and loss. In many designs, once the signal leaves the transformer, if the routing is a little longer, the insertion loss drifts unspeakably, especially when running to the high-frequency band, once impedance continuity collapses, the return loss also dives. Once we sent out a batch of boards, and to save money I found a multilayer board supplier that claimed to do impedance control. When the S-parameters were measured, the insertion loss was nearly one decibel more than the simulation, and in the end I found that that factory’s board material batch stability was simply unusable. Later I resolved to change to a high-speed PCB manufacturer specializing in high-speed digital boards and had their engineers recalculate dielectric thickness and line width compensation before the loss problem was really pressed down.

This made me thoroughly understand that for multilayer boards you cannot look only at layer count and quotation. When facing scenes with high routing density where BGA fan-out is cramped beyond viewing, I would rather give the order to a familiar HDI PCB manufacturer and use laser blind vias to shorten the critical path, where impedance control is much more stable. Now when I bring requirements to a board factory, I do not just say control 100 ohm differential for me; I stare at them and ask: which brand of base material do you use, how does the dielectric constant change with frequency, and where roughly do the measured insertion loss values fall at the points of 17MHz, 30MHz and 100MHz? A reliable HDI PCB supplier is one who dares to lay out loss curves at different frequencies for you to see.

Surge Protection Layout Again: Front Stage at the Connector

I have also suffered on the protection side. I used to think that soldering a low-capacitance TVS behind the coupler would settle everything, but once a surge came in, the residual voltage ran along the ground wire and shook the whole reference plane. Later I changed to a front-and-rear configuration: the common-mode protection device sits right at the connector entrance, and its grounding post goes directly through the screw hole to lock onto the chassis, without skimping on the contact of even one screw; the differential-mode one is placed behind the isolation transformer, and the whole path is guaranteed not to cross a split. Doing this not only protects the interface from dying but, more importantly, prevents ground noise from flowing back through shared paths into the power rail of the DSL line driver stage. At the end of the day, signal integrity and protection have never been two separate accounts: routing a few millimeters shorter and drilling one more group of ground holes often decide whether this board runs quietly at full throughput in the field or gets dropped by noise every few days.