{"id":12136,"date":"2026-11-03T15:01:00","date_gmt":"2026-11-03T07:01:00","guid":{"rendered":"https:\/\/www.sprintpcbgroup.com\/?p=12136"},"modified":"2026-11-03T10:29:09","modified_gmt":"2026-11-03T02:29:09","slug":"battery-formation-tester-pcb-heavy-copper-kelvin-sensing","status":"publish","type":"post","link":"https:\/\/www.sprintpcbgroup.com\/fr\/blogs\/battery-formation-tester-pcb-heavy-copper-kelvin-sensing\/","title":{"rendered":"Battery Formation Tester PCB: Heavy Copper, Kelvin Sensing and Thermal Design for Accurate Multi-Channel Formation"},"content":{"rendered":"
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Why Test Accuracy Is Decided by the Board<\/h2>

In the several years I have worked on battery formation equipment, I have slowly worked out a rather counterintuitive thing: when many people pursue test accuracy, their eyes are fixed only on the parameters of the ADC chip and the op amp, while the PCB itself is ignored. In fact, for a reliable Battery Formation Tester PCB, its routing layout and copper thickness selection are the hidden thread that decides the system noise floor and long-term stability. If you take an AFE whose accuracy is rated as high as you like and pair it with a casually drawn multilayer board, the numbers measured in the end still drift until they cannot be looked at.<\/p>

The year before last we changed a multilayer pcb supplier. That factory had good process capability, but its understanding of current sampling was too shallow. The Kelvin traces were not strictly length matched for me, and the return paths were drawn like an earthworm looking for its mother, winding all over. As a result, when 32 channels ran formation simultaneously, crosstalk between adjacent channels soared directly to tens of ppm; let alone 0.02%, even 0.1% could not be held steady. Later I specifically went to talk with a Heavy copper PCB manufacturer, and had them re-prototype a 12-layer board with 4 oz copper thickness, physically separating power ground and signal ground completely, with all high-current loops made as star collection, and only then was the problem pressed down.<\/p>

This made me obsessed with heavy copper. Formation work is a completely different matter from ordinary charging: hundreds of amps of current are poured into one tray, and if the copper foil of the PCB is thin, voltage drop and heating bring millivolt-level drift, and every accuracy budget is in vain. So when I later chose a Heavy copper PCB supplier, I would certainly look at whether they could make thick copper on inner layers while keeping layer alignment. Some factories claim they can, but once the inner copper gets thick, the dielectric layer thickness goes off, impedance cannot be controlled, and that is another pit.<\/p>

In the end, the board inside a formation device is not a matter of simply connecting a few wires. It carries the large-current pulses of the energy regeneration topology, withstands tens of watts of resistive heat, and has to hold a voltage control accuracy of two parts in ten thousand in every channel. Manufacturers who can make a Battery Formation Tester PCB both stable and accurate are actually few, and most people have not realized that the board itself is a physical threshold in the accuracy chain.<\/p>

Lamination, Etching and Copper Uniformity Across a Batch<\/h2>

After making several Battery Formation Tester PCBs, I have a judgment that is rather different from many peers: the performance bottleneck of this kind of board is often not the ADC in the schematic, nor the regeneration topology you chose, but whether the manufacturer you find is willing to be strict with you on lamination and etching details. Many teams tune things nicely in the lab at the early stage, but once volume arrives the current error drifts outrageously. After checking the reference voltage and sampling timing of the ADC for a long time, they finally find that in the same batch of boards the copper thickness at different positions differs by nearly ten percent. The etching uniformity of thick copper areas affects the current detection branch far more than many people imagine.<\/p>

Not All 3 oz Is the Same<\/h2>

On formation equipment, channel traces of tens of amperes are unavoidable, and thick copper boards are almost standard. But I have seen many people choose suppliers only by copper thickness specification, for example treating everything marked 3 oz as the same. In fact, the difference between a Heavy copper PCB supplier and a Heavy copper PCB manufacturer shows up in etch factor, distribution of hole wall copper thickness and consistency of dielectric layer thickness. At some factories, 3 oz narrows at corners to less than an equivalent 2 oz, and during discharge that spot becomes a hot spot; voltage drop between channels is inconsistent, so the ground potential seen at the ADC front end differs too. This is not something you can save by swapping in a better current sense amplifier. Many accuracy problems are rooted in the base material and processing, not in the chip being insufficient.<\/p>

Stackup Conversations Before Layout<\/h2>

The Battery Formation Tester PCB<\/a> has high channel density, with the analog front end, digital control and power stage all crowded together, and the stackup design matters more than part selection. My own habit is that before drawing the board, I first make clear to the multilayer pcb supplier the stackup thickness, residual copper ratio and glass cloth type, especially that the ground plane must not be casually shredded by vias and thick copper areas. Once the ADC reference ground loop detours around the power current path, the reading jumps; conversely, if the layout shortens the return path and connects analog ground and power ground at a single point only, even an ADC with ordinary specifications can hold its error steady in volume production. Most people are too willing to push the responsibility onto the chip and unwilling to admit that they did not handle the PCB’s physical constraints cleanly.<\/p>

Regeneration Topology Efficiency Depends on the Board<\/h2>

The same goes for the regeneration topology. Regeneration itself saves power, which nobody denies, but choosing LLC or DAB does not necessarily mean high efficiency. With the same schematic, running on boards from different manufacturers, an efficiency difference of two or three points is normal, since parasitic inductance and coupling capacitance differ. More troublesome is that the resonant currents and hard-switching spikes in the regeneration circuit couple through the gaps between planes into the analog front end. You think the ADC noise is too large, but actually the board was not done well. So now, when I work on a formation power supply project, I first pull the manufacturer in to evaluate the stackup and process window together, and then work backward to fix the details, instead of finishing the topology and device selection and then casually throwing it to some board factory to prototype.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t

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Copper, Current Sampling and Parasitic Resistance<\/h2>

The Most Underestimated Part of a Formation Cabinet<\/h3>

In the several years I have worked on battery formation and capacity-grading equipment, I increasingly feel that what is most easily underestimated is actually the board itself. Many people start by staring at the digital controller and the AFE architecture, as if choosing the right chip would naturally bring accuracy, but when things really run on the workshop floor, a Battery Formation Tester PCB that cannot carry the current can reset all high-precision design to zero. If you go to a multilayer pcb supplier<\/a> and talk, they will most likely bring out a conventional multilayer scheme, with impedance control and stackup explained very clearly, but once you mention each channel running forty or fifty amps for a long time, how the copper is distributed and how the temperature rise caused by internal resistance is handled, most of them become vague. At this point you will understand that finding a proper heavy copper pcb supplier is not icing on the cake but a basic condition for this problem. I have changed several heavy copper pcb manufacturers. In the early days, to save money, the current sampling section still used ordinary copper thickness, and the resistance values measured jumped up and down with board temperature. Even if your resistor devices are rated to a few parts in ten thousand, the milliohm-level parasitic resistance added on the traces can twist the current reading into something unusable. Later I learned my lesson and fought it out with manufacturers on copper thickness, line width and the separate routing of inner-layer Kelvin traces, and only then did the measurement accuracy of the whole current loop truly stabilize. So my view now is: do not put the whole accuracy budget on the device manuals; how the copper on the PCB runs, how thick it is, and who makes it for you almost decide how much current this system can truly capture.<\/p>

Thermal Rise, Temperature Drift and the 96-Channel Case<\/h3>

The thing that gives me the most headache about boards for battery formation testing is actually not how complex the circuit is but those unremarkable physical constraints. For example, for copper that carries large current, many people start by designing it like a conventional multilayer board, and as a result, once the board heats up, temperature drift makes the sampled data drift until it cannot be looked at. I have paid for this, and later when choosing board factories I would only pick those that could do thick copper. A reliable Heavy copper PCB manufacturer will not only talk copper thickness parameters with you; he will tell you how large the temperature difference between inner-layer copper and outer-layer copper is under the same current-carrying requirement, and how to handle trace corners so that current density is uniform.<\/p>

These things can never be understood if you treat the PCB only as a connecting carrier. I have a 96-channel formation device in hand, with 50A charge and discharge per channel. At first I used boards from an ordinary multilayer pcb supplier with 2 oz inner copper, and at full load after half an hour the local temperature difference on the board surface exceeded thirty degrees. Note that this was not heat produced by the power section; it was purely copper loss heating. Later I moved all current channels to 6 oz thick copper and re-prototyped with a Heavy copper PCB supplier, and the heating was pressed down. But new trouble came: the etching accuracy and line width uniformity of thick copper boards are not as good as conventional multilayer boards, and within the same batch the trace impedance of the shunt resistor could differ by 0.5 percent between boards. This translates directly into a systematic error in the ADC sampling chain, and one calibration is not enough at all.<\/p>

Where the Error Actually Comes From<\/h3>

It was at this moment that I really realized that the drift of a few tens of microvolts in the ADC is not the scariest thing. What is scariest is that you cannot tell whether the error comes from the amplifier, the reference source or the temperature gradient of the PCB copper itself. Some people like to pile on parts in the circuit, using a zero-drift amplifier with a 24-bit ADC, feeling that more bits will solve the problem. I do not think so. The current span of a formation and capacity-grading cabinet is too large, from a few hundred milliamps of trickle to tens of amps of pulses, and the noise environment is not of the same order at all. Once large current is applied, whole-board ground bounce and thermoelectric voltage couple into the traces, and even if you use a reference source with 0.1% accuracy and 5ppm temperature drift, the data actually sampled still jitters badly.<\/p>

Pressing Down Error Sources in Layout<\/h3>

So now I prefer to press down error sources at the layout stage instead of relying on algorithmic compensation after the board is made. For example, I put Kelvin sampling points at the root of the pad and do not casually pull a wire out of the middle of the copper pour; the temperature sensing point is not on the back side but buried directly on the same copper layer next to the power transistor; and where analog and digital ground are single-point tied, I would rather spend a piece of copper area to avoid the large-current return path. These details, if not communicated with the manufacturer early in the system design, are useless however many layers the board has. A good multilayer pcb supplier will proactively discuss with you the influence of the stackup on temperature drift, rather than mechanically running automatic checks. After all, in the field of battery formation, a board that goes out runs for tens of thousands of hours, and when the equipment shows batch accuracy exceedances at the customer site and has to be reworked, the cost is far higher than switching to a somewhat more expensive PCB supplier.<\/p>

Detection Traces, Reference Planes and Kelvin Pads<\/h2>

A Reference Plane Churned by Tens of Amperes<\/h3>

When making circuit boards for battery formation equipment, what you often find headache-inducing is not op amp selection or ADC bit count but the relationship between the large-current copper and the detection traces. Some time ago I prototyped a Battery Formation Tester PCB and the test accuracy could not be raised no matter what. Calibration afterward could not pull it back at all, and in the end, after teardown and analysis, I found that the reference plane of the detection signal traces had been churned beyond recognition by tens of amperes of charge and discharge current. The feeling was this: you spend big money on high-precision devices, and on the PCB they are ruined by a path of copper a few millimeters wide.<\/p>

A Heavy Copper Manufacturer Who Joins Stackup Planning<\/h3>

Later I switched to a Heavy copper PCB manufacturer that specialized in thick copper boards. They did not much regard themselves as merely a “board factory” and instead intervened early in your stackup planning. I remember that engineer telling me directly: if you do not carve out the ground of your detection section separately, even with four-layer or six-layer boards, signal integrity will not be good. At that time they proposed placing the detection traces on the inner layers with a reference layer spread above and below, physically isolating them completely from the power copper. This kind of detail in a multilayer structure is something a general multilayer pcb supplier may not proactively remind you about; they are used to working from your Gerber and not making errors. So finding a manufacturer willing to talk about design intent saves much more time than groping through trial and error on your own.<\/p>

Calibration Only Makes Sense After Convergence<\/h3>

Only after the detection signal trace problem was solved did calibration truly become meaningful. In earlier multi-channel formation work we had obvious crosstalk between channels, and one reason was that the residual copper resistance along the detection path was inconsistent on each board that came back. However good your calibration flow is, if the board’s own error source is unstable and the temperature rise differs on every power-up, the calibration value becomes a number like carving a mark on the boat to find the sword. What I insist on more now is that before formal production, I must have the Heavy copper PCB supplier send me a thermal image of the current density distribution of the first article, especially looking at the thermal gradient between the large-current paths and the detection pads. This is more intuitive than any simulation. Calibration has to be done, but it must be built on the premise that both routing and thermal design have converged; otherwise the so-called “full temperature range calibration” just hides the problem in the coefficients, and once the battery enters the late stage of formation with violently changing current, the accuracy drifts until it cannot be looked at again.<\/p>

Common Ground in Multi-Channel Boards and Kelvin Pads<\/h3>

There is also an easily overlooked point, the common ground treatment of multi-channel boards. I do not much agree with the dogma that “pulling a separate ground line from every channel back to the main ground point settles everything,” because under large-current pulses, even with single-point grounding, the reference potentials seen by detection amplifiers of different channels still have dynamic differences, and the di\/dt of the pulse presses millivolt-level jitter onto the common copper. My approach now is to connect the reference of the detection amplifier directly to the Kelvin small pad of the corresponding shunt resistor, and to route the detection traces differentially, not taking part at all in the current recovery on power ground. This kind of design puts higher demands on PCB process, with trace spacing and copper thickness uniformity that a general multilayer board factory may not be able to make beautifully, so later I fixed my cooperation with that mature Heavy copper PCB manufacturer, whose control of copper thickness and inner-layer etching consistency really helps trace accuracy.<\/p>

The PCB as Part of the Analog Front End<\/h3>

In the end, in the accuracy chain of the Battery Formation Tester PCB, the influence of the PCB itself is much greater than imagined. It is not simply a connecting carrier but part of the analog front end. Detection traces, manufacturing process and calibration algorithms must be iterated together, and a product cannot be made stable if any one of the three is missing.<\/p>

Parasitics, Soft Calibration and Channel Consistency<\/h2>

The Misunderstanding About the Hardware Carrier<\/h3>

In the last two years of dealing with battery production lines, I increasingly feel that many people have a misunderstanding about the Battery Formation Tester PCB: they always stare at the bit count of some ADC or the noise density of some op amp and instead take the underlying hardware carrier lightly. Put simply, however precise the sampling chain, if the PCB itself absorbs stray inductance and ground bounce noise like a sponge, calibration at the software level is at best forcibly patching a system that has already gone crooked.<\/p>

Thermal Cycling and Microohm-Level Variation<\/h3>

Recently I compared several multilayer pcb suppliers, and some manufacturers’ engineering capability was completely unable to keep up with their advertising; after sending drawings, even the impedance control scheme required repeated tug-of-war. Later I found a Heavy copper PCB supplier that truly specialized in industrial control and instrument boards, and after chatting I understood that copper thickness of a large-current channel is not a matter of just stacking it up and being done. Whether the glass fiber board in a thick copper area will delaminate between copper skin and dielectric layer after repeated thermal cycling directly relates to the microohm-level variation of the channel after long-term operation, and such variation cannot be perceived by the sampling loop at all; it quietly eats up the system accuracy you were supposed to have.<\/p>

How Sampling Routing Decides a Hundred-Channel Cabinet<\/h3>

Going a bit deeper, for formation cabinets with dozens or even hundreds of channels, how each sampling signal is routed in the multilayer board is nearly decisive. One Heavy copper PCB manufacturer has paid for this: its early version separated analog ground and power ground too mechanically, and as a result the current shock at the instant of commutation excited a voltage difference of several hundred nanoseconds at the edge of the split slot. Sampling points between channels were nominally aligned but in reality were thrown off by this common-mode swing. This kind of deviation cannot be corrected by calibration, because during static small-current calibration this trench shows no problem at all, but under real large-current commutation the whole noise spectrum is different.<\/p>

Planes That Calibration Cannot Fix<\/h3>

Later the scheme finalized on my side simply made the high-precision sampling channels and the large-current copper busbar a nearly unsplit plane system, so that return paths are naturally short and wide physically. As for calibration, it only handles known systematic drift, such as temperature drift and the static tolerance of the shunt, and never expects to compensate for any directional error caused by layout. If you make calibration carry a job it cannot carry, you will eventually see on the production line that in the same batch of cells the capacity grading results always have a few unexplainable outliers, and tracing it down to the end is often because the PCB channel consistency slipped. So when peers come to ask, I tell them directly that finding a reliable Heavy copper PCB manufacturer is more useful than spending several months tinkering with calibration algorithms in later debugging.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t

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PWM Edges, Thick Copper Inductance and Shoot-Through Risk<\/h2>

Heavy Copper Is Not Just Copper Thickness<\/h3>

A while ago I helped a friend with battery formation equipment, and he was everywhere looking for a reliable Heavy copper PCB manufacturer<\/a>, and I had some unexpected takeaways. Many people think that a board of this high-current kind is just a matter of thicker copper and wider lines, and finding a multilayer pcb supplier to do the stackup well is enough. In fact, when the PWM signal runs around 400kHz, the parasitic inductance brought by the copper thickness can make the waveform a mess, and can even make the control loop oscillate directly. When I tested on a 4 oz copper board, the rising edge overshoot ate up nearly 15% of the pulse width, the current could not stabilize, and I thought the sensor was broken. A later check showed that it was the distributed parameters of the trace making trouble. For instance, with 50% duty cycle set, the effective pulse width was actually compressed to only about 42%, and the peak-to-peak ringing at the switching node even exceeded half of the bus voltage, causing periodic false peaks on the current sampling waveform that the digital control algorithm misjudged as overcurrent, repeatedly triggering protection. At the time I used an LCR meter to back-calculate that 10 cm main loop trace, and the parasitic inductance was actually more than 12nH. At the commutation instant with di\/dt as high as several hundred amperes per microsecond, the induced voltage was enough to make the gate drive waveform show a second step, which is the root of the Miller turn-on risk.<\/p>

Isolation, Leakage and Splitting Power Ground from Signal Ground<\/h3>

Isolation is also a headache. I do not much believe in solutions that use magnetic coupling for signal isolation while also hoping precision analog sampling will not drift. When temperature rises, the leakage current of the isolation barrier can shift the ADC reading by several millivolts. Later I simply split power ground and signal ground completely on the board, with only an independent isolated power supply and a low-speed optocoupler to shake hands between them. The analog front end on the Battery Formation Tester PCB must guard its own ground and not get involved. For example, in a high and low temperature experiment at 85 degrees C, the isolation barrier leakage current of one magnetic coupler soared from 0.1 microamp at room temperature to nearly 3 microamps. This current flowing through the milliohm-level impedance of the analog front-end ground plane produces a common-mode error that is enough to make the reading of a 24-bit delta-sigma ADC drift by several tens of LSBs, which cannot be corrected by software at all. In the end I used a dedicated analog front-end chip with an internal transformer isolation, sending sampled data out through a digital isolator, while on the power side only a low-speed optocoupler is retained to pass fault signals. Between the two grounds there is no electrical connection other than one 5kV isolated DC\/DC module, and only then was the crosstalk between channels pressed below -120dB. This forces you to find a Heavy copper PCB supplier that can do hybrid lamination, handling the large-current layers and the sensitive layers with different base materials, and not every one is willing to take such an order.<\/p>

Clean PWM Edges Over Fast Sampling<\/h3>

On loop bandwidth, I think there is no need to chase fast sampling to death. Cell formation is a slow process, and if the voltage change can hold steady to the third decimal place each second, that is already good. Rather than pursuing an aggressive rate of 50kSPS, I care more about the cleanliness of the PWM edges. High-resolution PWM is of course good, but if the delay of your front-stage driver chip is asymmetric, even the finest duty cycle is pulled crooked. There is a detail here: the drive traces on the Battery Formation Tester PCB must be length matched and kept close to the reference layer, otherwise the Miller plateau of upper and lower switch transitions becomes a trap of thermal runaway, and the probability of burning the transistors is greater than you think. Because once PWM edge jitter turns into duty cycle noise, it produces a low-frequency beat in the inductor current, and although the sampling rate is low, those sharp overshoots will alias into the baseband and make the software filter ineffective. More hidden is that if the gate trace lengths of the upper and lower switches differ by more than 5 millimeters, at a 400kHz switching frequency the corresponding propagation delay difference can reach tens of picoseconds, which is enough to make dead time deviate from the preset value and, in the extreme, even make the upper and lower switches briefly conduct together. The instantaneous shoot-through current not only directly burns the MOSFET but also accumulates thermal stress on the heavy copper traces, and after repeating several times the copper skin blisters and delaminates.<\/p>

Thinking About Where Heat and Fields Flow<\/h3>

In the end, the board is only a part, and the most important thing a person learns in this process is not to let the inertial thinking of “high-speed design” override the crude reality of the power level. Heavy copper, isolation, loops and PWM, to put these things together you must first think clearly about where heat and fields actually flow, and only then have the manufacturer stack things according to your intention. Heat flow is not just a matter of looking at copper cross-section area to calculate temperature rise; you must also trace the entire thermal resistance path from the chip pad through the thermally conductive fill material to the aluminum alloy substrate. Even a milliohm-level sampling resistor, with 50A flowing continuously, becomes a local hot spot and pushes the FR-4 glass transition temperature of the adjacent layers to the critical point. The flow of fields requires you to imagine the return path of every high-frequency switching current as a mirror image close to the source trace. Once the heavy copper layer is hollowed out or interrupted without restraint, the return is forced to detour, and the loop antenna effect formed couples radiated interference into the neighboring analog sampling lines. Only when you thoroughly understand these two can even the heaviest copper and the most complex stackup become your helper rather than a hot brick. Otherwise, even the most expensive multilayer pcb is just a hot brick.<\/p>

Bus Copper, Regeneration and System Efficiency<\/h2>

A Cabinet Where the Bus Voltage Danced<\/h3>

A while ago a project gave me quite a hard time: choosing the PCB for a formation cabinet. You might think it is just a board, so find a multilayer board supplier to prototype and be done, but actually that does not work at all. At first, to save trouble, I found a factory that made ordinary multilayer boards, and when discharge began all the problems came out: hundreds of channels regenerated at the same time, the bus voltage danced, and the test data could not be used at all. After teardown analysis, I found the busbar copper was hot enough to fry an egg, and the voltage drop had eaten several tens of millivolts, which for lithium battery capacity grading is already a disaster.<\/p>

Heavy Copper on the Bus Layer<\/h3>

This forced me to go find a manufacturer that truly understood the Battery Formation Tester PCB. There is no mysticism about this kind of board, but one thing cannot be bypassed: the bus layer must use thick copper. In a formation cabinet with tens of thousands of battery channels, current is drawn from the bus during charging and poured back hard during discharge, and the equivalent instantaneous current of the bus easily exceeds a hundred amperes; if the copper thickness is not sufficient, internal resistance and temperature rise are hard flaws. I simply switched to a factory specializing in Heavy copper PCB, requiring 6oz copper on inner layers with additional plating on the surface. They even had a Sumitomo lamination line, and after the boards came out, warpage was controlled within three thousandths, and only after installation into the cabinet busbar did things finally settle.<\/p>

Energy Regeneration Details and Parasitic Inductance<\/h3>

This is just the bottom line of heat and current-carrying. The details in the energy regeneration circle rely more on experience. Battery discharge is not simply pushing energy onto the bus and being done; the control loop has to manage the slope of the regeneration current finely, and if PCB routing takes even one more bend, parasitic inductance can make regeneration spikes jump to the high-side sampling end. The Heavy copper PCB manufacturer I cooperate with has a long background with formation equipment power systems, knowing how to bury copper blocks inside the multilayer board to balance thermal expansion and also how to keep regeneration loops away from low-frequency ground bounce. This design intuition is not something an ordinary multilayer pcb supplier can give you. I asked their chief engineer, and he said this board is the heart in a formation cabinet: only when the bus is steady can regeneration efficiency even be discussed, otherwise the so-called energy-saving regeneration is only a concept, and the actual measured system efficiency is still miserable.<\/p>

What Optimized Thick Copper Boards Return<\/h3>

The gains in discharge can be touched only when the board supports them. In the formation process, every time a battery discharges, if the energy is not regenerated and is consumed purely by resistors, the workshop electricity bill and air conditioning cooling are a bottomless pit. With the optimized thick copper board and fine regeneration control, we pressed the bus ripple within 20 millivolts, charge and discharge feedback was basically balanced, and the input power of the whole cabinet dropped a step. At that moment you feel that all the losses suffered earlier in choosing PCB suppliers were worth it.<\/p>

LLC Versus DAB and the Real Board-Level Test<\/h2>

Why Topology Is Not the Whole Story<\/h3>

In the years I have made formation power boards, my biggest feeling is that many people think too narrowly, staring at the beautiful waveforms of topologies like LLC or DAB, while forgetting that what really lets a product land is that unremarkable circuit board. I have seen too many projects whose design used the latest wide-bandgap devices and whose simulations ran flying, and which rolled over in multilayer board layout. You cannot just find any multilayer board supplier to handle this kind of board; you must find a manufacturer who truly understands large current and high heat dissipation.<\/p>

Why LLC Is Not Natively Four-Quadrant<\/h3>

I actually do not have much attachment to LLC. It is indeed comfortable in efficiency for unidirectional charging, soft switching runs with small loss, but once you must move energy back and forth, it is not made to natively support four-quadrant operation. In battery formation, the charged-in electricity must be discharged again and fed back to the grid or the bus, and at this time LLC becomes a bit awkward: you must additionally take care of resonant parameters in reverse mode, and at light load the voltage may drift. The symmetric structure of DAB, on the contrary, is naturally suited to bidirectional operation, and shifting the phase reverses the power flow, saving a lot of logic switching trouble. But DAB is more demanding on the consistency of magnetics and drivers, and if the leakage inductance of the transformer is not controlled steadily, once stray parameters on the board mix in, the efficiency curve drops right in front of you.<\/p>

Heavy Copper Plating, Via Filling and Microcracks<\/h3>

So when it comes to board-level realization, what truly tests a manufacturer’s skill is not getting signals through but how to handle those tens or even hundreds of amperes of charge and discharge loops. At this time you must weigh the level of the heavy copper PCB supplier. It is not simply thickening the copper; the inner-layer connection of thick copper boards, thermal cycling reliability and via copper filling process directly determine consistency and lifetime. I met a case where after the formation cabinet ran for three months, current deviation in some channels grew larger. The investigation found it was not a device problem but that the inner-layer copper foil in the PCB had developed microcracks after repeated thermal expansion and contraction, and the impedance had changed. After switching to a heavy copper PCB manufacturer that specialized in solid copper filling and repeated thermal shock verification, the problem was solved completely. This kind of board cannot be seen from the sample at all; only after running hundreds of temperature cycles do you know whose process is truly solid.<\/p>

Modular H-Bridges and Layer Counts<\/h3>

At the system level, I now prefer the modular H-bridge approach, with each battery channel an independent small unit and charge and discharge sharing the same set of switches, so that power flow can switch seamlessly between charging and regeneration, and ripple is even pressed lower than by a pile of LC filters. But the price of doing so is that component count more than doubles, putting integration and thermal design of the Battery Formation Tester PCB at full stretch. For a 120-channel cabinet, if all discrete H-bridges are piled up, board area and layer count expand sharply, and at this time you must find a multilayer pcb supplier that can stably supply twenty layers or more and has buried copper blocks or metal core hybrid lamination capability. Factories that rely on standard FR-4 to win the world simply cannot take this job, and give themselves away as soon as thermal simulation is run.<\/p>

Why Not Silicon Carbide at High Voltage<\/h3>

Someone asks why not go straight to silicon carbide modules on a high-voltage small-current route. On paper efficiency is high, but the protection speed at fault, the cost of EMI suppression, and replaceability for maintenance all have to be recalculated. At least at this stage, I would rather use mature large-current low-voltage devices and spend more cost on board-level heat dissipation than throw all the pressure onto the power devices themselves. A good Battery Formation Tester PCB is in essence about balancing the three variables of heat, electricity and stress, which is much more valuable than simply chasing the parameters of some device. So when choosing a supplier, do not be greedy for cheap and go for one that only makes boards from drawings. Talk to ones who know the process, who can discuss inner-layer copper thickness allocation and creepage distance compensation with you, and who can even advise how to offset thermal warpage through stackup order. This communication cost, saved to the end, turns out to be the most valuable part.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t

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Heavy Copper Suppliers, Isolation and Microcracks<\/h2>

What Seven or Eight Multilayer Suppliers Taught Me<\/h3>

Anyone who works on battery formation equipment knows that the Battery Formation Tester PCB is the skeleton of the whole system. The current is often tens of amperes, and the requirements on the PCB simply cannot be handled by the logic of conventional consumer electronics. In the past two years I have dealt with at least seven or eight so-called multilayer pcb suppliers, and in the end those that can stably supply heavy copper are actually few. Many manufacturers claim they can make large-current boards, with copper thickness up to 6oz or even 10oz, but once in volume production, lamination uniformity, solder mask thickness and hole copper consistency are all problems. Later I learned my lesson and focused on the few heavy copper pcb manufacturers that specialize in this, looking at whether they had long-term actual cases of building for power electronics.<\/p>

Isolation Without a Transformer<\/h3>

A recent project illustrates the point especially well: we wanted to save the isolation transformer on the board and take the modular H-bridge route, letting energy circulate directly on the DC bus. It sounds good, with cost down a notch and volume smaller. But only when we actually laid out the board did we appreciate that without the physical isolation layer of the transformer, the whole bus shares ground with the battery, and common-mode noise runs all over the board. At this point you must be extremely strict about the PCB’s isolation design and cannot rely on software algorithms for remediation. In the end we were forced to carve out a layer of ground isolation band in the multilayer board, bridge power ground and signal ground with a capacitor, and increase creepage distance to the extreme according to safety regulations. A general multilayer pcb supplier simply cannot make this kind of board properly, because it is not a simple stacking of layers but requires a factory that understands power loops and knows hot and cold, one willing to grind through the process with you repeatedly.<\/p>

Why Finding the Right Heavy Copper Supplier Beats Chasing Topology Efficiency<\/h3>

So now I have a view that may differ from the mainstream: in this field, finding the right heavy copper pcb supplier is far more important than agonizing over topology efficiency. However impressive your topology, if efficiency is two points better but the copper skin gets microcracks with vibration, or the isolation distance is insufficient and arcing burns a patch, that is all zero. Stability overrides everything. However exquisitely the bus is designed, it needs a thick copper board that can withstand thermal cycling and mechanical stress to carry it out. Later I did not even feel at ease leaving layout entirely to the partner. Before each prototype run I squatted by the production line myself to watch them laminate and etch, just to confirm that those tens of large-current paths were truly being treated as a lifeline, not as an ordinary order on an assembly line. In dealing with batteries, what is contested in the end is not whose solution is fancier but whether the PCB carrying tens of amperes of current can run for three or five years without strange incidents, and that is the real threshold of a heavy copper pcb manufacturer.<\/p>

Hot Spots, Via Plating and Layer Strategy<\/h2>

A 150A Test Board at 107 Degrees<\/h3>

The more I do formation equipment these years, the more I feel that the choice behind a reliable Battery Formation Tester PCB can directly decide whether the whole project lands smoothly or rolls over repeatedly. I used to think that finding a cheap multilayer pcb supplier to print the board was enough, since the design drawings were the same anyway. Later, after two boards in a row were burned on large-current paths, I understood that the account is not computed this way. The bottleneck is not which manufacturer quotes lower, but whether you can find a Heavy copper PCB supplier who truly treats current density and thermal paths seriously.<\/p>

My deepest memory is a test board for a 48V bus scheme which, when passing 150A of continuous current, saw the temperature gun reading on the copper foil surface soar straight to 107 degrees, and the MOSFET junction temperature on the mainboard simulated to nearly 140 degrees. On teardown, the vias were drilled sparsely and all crowded near the connector, and the far end relied almost entirely on the copper skin to take the load. At that time the Heavy copper PCB manufacturer told me their conventional process was 2oz inner and 3oz outer, and they could not go thicker. I did not think much and accepted it by default, and as a result the heat dissipation path was a mere formality. Thinking back now, in the semi-enclosed racks of formation cabinets, ambient temperature is often over forty degrees, and skin effect on current plus trace bottlenecks amplify local thermal stress to an unreasonable degree. So later, when placing orders, I required the outer-layer copper thickness to be stacked at least to 6oz, and I must get a cross-section report to see whether the copper thickness distribution is really uniform, not just talk.<\/p>

Thermal Via Plating Is Bound to Current Capacity<\/h3>

Many people fight over copper thickness but ignore the derating path of junction temperature. The thermal vias under the heat dissipation pad of a high-power MOSFET are the real weak spot. I have seen boards with densely packed vias under the device, yet with only 20 micrometers of copper on the hole wall, thermal resistance stays high and the junction temperature still cannot come down. Now when I talk with all suppliers, I bind current-carrying capacity and the plating thickness of thermal vias together in my requirements, and I do not accept the practice of guaranteeing conduction but not heat dissipation. Also, the arrangement of vias on current paths matters more than their quantity. I have them spread evenly along the current path rather than crowd in loose areas to make up numbers. When every channel in a formation device discharges at the same time, the total current on the DC bus easily exceeds two or three hundred amperes, and the cross-section change and contact resistance where the bus copper bar joins the PCB copper are far more sensitive than imagined; a slight mishandling becomes a bright spot under the thermal camera.<\/p>

Not Blindly Stacking Layers<\/h3>

On the multilayer structure, I actually feel there is no need to blindly stack layers. Some designs, to look good, split the large-current layer into several layers in parallel, but if interlayer current-carrying is not given current-sharing treatment, the actual sharing can differ by more than 30%, some layers get overloaded and hot, the internal stress of the board accumulates day after day, and finally the dielectric layer cracks. I prefer to have the multilayer pcb supplier use thick copper on a single layer for the key current loop and then add solder-opening tin plating or soldered copper bars on the outer layer, which is much better than simply stacking layers. When choosing a manufacturer, I am also more willing to find Heavy copper PCB manufacturers with a power electronics background rather than factories that only make consumer digital boards. Because this kind of board is not just about current-carrying and heat dissipation; it also involves interlayer bonding force under high-temperature aging and the independence of safety detection circuits. The routing of temperature sensors and smoke detection must never take power from the main control channel, and they need independent isolation islands. All of this is understanding polished by actual delivery, not something a specification can teach.<\/p>

Precision Is Not Bought with ADC Bits Alone<\/h2>

Why Calibration Cannot Repair Design Flaws<\/h3>

In the years I have worked on battery formation equipment, I have seen too many people put accuracy on the bit count of the ADC, as if choosing a 24-bit or even 32-bit chip settles everything. When the boards come back and are measured, the temperature drift is a mess and channels interfere with each other, and only then do they realize that things are not that simple.<\/p>

The large-current paths on the Battery Formation Tester PCB are the real devils. Several hundred amperes of charge and discharge current flowing on copper foil produce thermal gradients that make the resistance value change subtly, and at this time, however clean you make the ADC reference voltage, the voltage drop across the shunt resistor itself is already drifting. In one project, the multilayer pcb supplier we found at the start used a conventional process, and after the boards came back we found channel consistency could not be stabilized however we tuned it. Later, probing node by node with an oscilloscope, we found the problem lay in the inner-layer ground return path: multi-channel current sampling shared one segment of copper skin, and impedance of a few tens of microohms was enough to pull the neighboring channel’s reading off by a small amount. After that, we directly changed to a Heavy copper PCB manufacturer and made the ground of the sampling stage a star differential lead-out, and re-did the thermal balance simulation for the thick copper areas. The effect was immediate: without frequent calibration, batch consistency held within the design target.<\/p>

The PCB as a Precision Measurement Front End<\/h3>

This incident made me re-understand the word “calibration.” Calibration is the last line of defense, but it cannot correct inherent defects in design. Especially when it involves the irregular copper thickness distribution provided by a Heavy copper PCB supplier, you must treat the PCB itself as a precision measurement front end: the width transitions of traces, the filling process of vias, and even the heat-capacity differences brought by solder mask thickness can all influence that 0.01% deviation more than we imagine. So when someone asks me what ADC to buy now, I often first ask them: can your PCB manufacturer give you an impedance test report, and what does the thermal image of your current sampling nodes look like? That is the real beginning of landing accuracy.<\/p>

Calibration Is a Lifecycle Concept<\/h2>

Many Engineers Treat Calibration Too Lightly<\/h3>

For boards of battery formation test equipment, there is one thing I get a headache thinking about: many engineers treat calibration too lightly. They think running through the process once at room temperature and sticking a label on it settles everything, and putting this thought on a production line is simply digging a pit for oneself. Among the several heavy copper PCB manufacturers I have dealt with, those who can really talk through the connection between current sampling accuracy and thermal drift with customers can be counted on one hand. Most multilayer pcb suppliers care only about whether line width and spacing can be made and whether copper thickness can be stacked to 6oz or 10oz, but once you mention that a Battery Formation Tester PCB needs to run for a long time in a cabinet environment of 45 degrees C or higher, and that isolation between channels is by no means just adding an optocoupler, they have nothing to say.<\/p>

The Question About Temperature Chamber Calibration<\/h3>

When looking for a manufacturer, I slowly developed a habit: do not talk price first, but ask directly: how many sets of temperature chamber calibration does your production line do before shipment? If the other party is stunned, or says they only tune the reference voltage at room temperature, I basically pass. Because the accuracy drift of the current detection channel in a formation cabinet is rooted not only in the op amp and shunt resistor themselves but even more in the uneven thermal distribution of the PCB. However good the low-temperature-drift alloy resistor you use, if the heat-spreading copper in layout is asymmetric, or the Kelvin traces are not truly independent and rub into the power return area midway, that microvolt-level error is magnified into something completely unacceptable at high temperature. At this time the meaning of isolation is not only anti-common-mode interference; a temperature difference of even a few degrees between channels makes the accuracy split after long-term sampling.<\/p>

Calibration Data Bound to Serial Numbers<\/h3>

Later I worked in with a heavy copper PCB supplier for quite a long time. They were willing to do zero-point calibration and full-scale calibration at multiple temperature points according to my requirements, and bind each board’s data to its serial number for archiving. Only then did I feel somewhat at ease. Making this kind of board is not about who has thicker copper or more layers; you have to be clear that calibration is a continuing concept, which must follow the board through its whole life cycle, not a one-time action on the production line.<\/p>

Insufficient Copper Thickness Behind Channel Drift<\/h3>

Not long ago a customer making lithium battery formation equipment came to me, and when we chatted, their prototype had channel drift all the time when running cycles in batches, and after a round of checking the problem was finally found to be insufficient copper thickness on the test board. This matter is actually quite typical. Many equipment makers, at the start, to save a bit of board material cost, find an ordinary multilayer board supplier to make a standard 1 oz copper board and put it online, and as a result, once large current passes, the inner-layer voltage drop directly eats up a few tenths of a millivolt, and the accuracy of the whole system collapses. Battery testing is unlike ordinary digital circuits: even an offset of only a few microvolts, converted into capacity calculation, is a cumulative deviation, especially since the formation process often runs dozens of hours, and a little temperature drift superimposed finally yields data that cannot be used at all.<\/p>

Four Ounce Copper and Thermal Uniformity<\/h3>

Later we re-prototyped that prototype, directly using a 4 oz thick copper board made by a heavy copper PCB manufacturer, and completely re-routed the original power layer and sampling traces. The change brought by thick copper is not only the drop in on-resistance; what impressed me more is that the thermal uniformity of the whole board improved a lot. In the past, with an ordinary board, the temperature difference across the board surface could reach over ten degrees, but after switching to thick copper, heat dissipated quickly, and the temperature difference between channels was basically pressed within 3 degrees. This is a real improvement for battery testing, because once the temperature drift of the sampling resistor goes down, the long-term zero stability of the whole Battery Formation Tester PCB goes up a step directly. Finding the right heavy copper PCB supplier is really much more effective than spending a pile of effort on software compensation afterward.<\/p>

Reading a Supplier’s Real Capability<\/h3>

I have also stepped in pits when looking for suppliers. There is a large number of factories on the market advertising multilayer boards, and when you actually send your stackup requirements, especially asking for inner-layer thick copper plus blind and buried vias, many have no follow-up. A manufacturer who can truly do it well will dare to discuss current density distribution and the current-carrying margin of inner copper foil with you at the prototype stage, not only staring at line width and spacing. Now, to judge whether a heavy copper PCB manufacturer is reliable, I first look at whether they can explain the uniformity of copper thickness and lamination process clearly, rather than listening to them talk about how fast the delivery is. In the test equipment industry, precision has never been bought by a single ADC or precision op amp; the PCB itself is the first link of the accuracy chain, and this is far too easy to ignore.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>","protected":false},"excerpt":{"rendered":"

Working on battery formation equipment, I learned that test accuracy depends not only on the ADC and op amp: the routing layout and copper thickness of the Battery Formation Tester PCB set the system noise floor. When Kelvin traces were not length-matched, and return paths were messy, crosstalk reached tens of ppm on 32 channels running formation at the same time. Re-prototyping a 12-layer board in 4 oz heavy copper, with power ground and signal ground physically separated and high current collected in a star, restored accuracy. Learn how to choose heavy copper PCB suppliers for formation and capacity-grading cabinets.<\/p>","protected":false},"author":1,"featured_media":11960,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[51],"tags":[],"class_list":["post-12136","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-blogs"],"yoast_head":"\nBattery Formation Tester PCB: Heavy Copper, Kelvin Sensing and Thermal Design for Accurate Multi-Channel Formation<\/title>\n<meta name=\"description\" content=\"Working on battery formation equipment, I learned that test accuracy depends not only on the ADC and op amp: the routing layout and copper thickness of the Battery Formation Tester PCB set the system noise floor. When Kelvin traces were not length-matched, and return paths were messy, crosstalk reached tens of ppm on 32 channels running formation at the same time. Re-prototyping a 12-layer board in 4 oz heavy copper, with power ground and signal ground physically separated and high current collected in a star, restored accuracy. Learn how to choose heavy copper PCB suppliers for formation and capacity-grading cabinets.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.sprintpcbgroup.com\/fr\/blogs\/battery-formation-tester-pcb-heavy-copper-kelvin-sensing\/\" \/>\n<meta property=\"og:locale\" content=\"fr_FR\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Battery Formation Tester PCB: Heavy Copper, Kelvin Sensing and Thermal Design for Accurate Multi-Channel Formation\" \/>\n<meta property=\"og:description\" content=\"Working on battery formation equipment, I learned that test accuracy depends not only on the ADC and op amp: the routing layout and copper thickness of the Battery Formation Tester PCB set the system noise floor. When Kelvin traces were not length-matched, and return paths were messy, crosstalk reached tens of ppm on 32 channels running formation at the same time. Re-prototyping a 12-layer board in 4 oz heavy copper, with power ground and signal ground physically separated and high current collected in a star, restored accuracy. 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When Kelvin traces were not length-matched, and return paths were messy, crosstalk reached tens of ppm on 32 channels running formation at the same time. Re-prototyping a 12-layer board in 4 oz heavy copper, with power ground and signal ground physically separated and high current collected in a star, restored accuracy. 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Re-prototyping a 12-layer board in 4 oz heavy copper, with power ground and signal ground physically separated and high current collected in a star, restored accuracy. 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