Process Control PCB Design: Why Manufacturing Detail, Not Circuit Theory, Determines Long-Term Signal Drift

Reference and Power Design: Why the LDO Location Matters More Than the Chip’s PSRR

Working on process control PCBs for so many years, I have increasingly come to feel that power and reference are never something you settle just by picking a chip with beautiful specs. Many problems originate in the PCB itself, especially when you are not using an ordinary double-sided board, but a complex stack-up structure hammered out over half a year of back-and-forth with a multilayer board supplier.

Once we built a high-precision analog acquisition board, using a reference chip rated at ±0.02% initial accuracy with 1.5ppm temperature drift — theoretically, it should be rock-solid anywhere. Once mounted and measured, noise was an order of magnitude higher than expected; after tracing it all the way down, we found digital-section power noise was coupling in through the ground layer. The reference pin’s decoupling capacitor sat a bit too far from the chip, and its return path happened to overlap with a high-speed digital signal’s ground return — effectively pouring interference straight into the reference. Since then I have established one ironclad rule: the reference’s power routing must always go on its own dedicated LDO, and that LDO’s input can never draw directly from the system power plane — it must instead draw from a sufficiently wide dedicated supply channel routed on an inner layer built by the multilayer PCB manufacturer, wrapped in copper on all sides, with a complete reference plane above and below.

Many people think a multilayer board is just about throwing money at more layers — in reality the real value lies in how you plan the power plane and ground plane. My current habit, for instance, on an important Process Control PCB, is to dedicate at least one entire layer to analog ground, and before that layer connects to digital ground at a single point, absolutely no digital-signal return path is ever allowed to cross through it. This requires clear communication with the multilayer PCB supplier right from the stack-up design stage — which layer carries what signal, how tight impedance control needs to be, which locations require a coplanar waveguide structure. Some suppliers just manufacture to whatever your Gerber file says, uninterested in why you designed it that way — this kind of partnership is exhausting. A good supplier will remind you — for instance, that your reference trace is running too close to the board edge, or that there is a cavity beneath a pad that will affect thermal dissipation — these details are more useful than a chip’s datasheet.

Another point is the overall stability of the power system. I have seen plenty of boards using very expensive power-management ICs, but with poor layout — large-current loop area too large, ripple simply cannot be suppressed. Especially in a process-control scenario like this, often also having to account for intrinsic-safety requirements, trace width and spacing carry strict regulations and cannot simply be calculated based on conventional current-carrying capacity alone. In this situation, the reference’s power supply becomes extremely fragile, because once front-stage DC-DC ripple sneaks into the LDO, even the best PSRR cannot save you from low-frequency noise. So now, when I do PCB design, the power section is always simulated first, and then I confirm the board shop’s actual dielectric thickness and copper-foil roughness with them — because these parameters directly affect power-plane impedance, and if impedance has a problem, no matter how high-end the reference you chose, it is wasted.

At the end of the day, the reference and power supply are not isolated design elements — they live on the PCB, and the PCB is physical, with parasitic parameters, thermal gradients, and manufacturing tolerances. Choose the right multilayer PCB manufacturer, and they can help you keep those invisible errors within an acceptable range, rather than leaving you alone, staring at the board, measuring a pile of inexplicable noise all by yourself.

Surge Protection and Long-Term Drift: Why the Ground Plane Is the Real Discharge Path

Working on process control boards, I have hit far too many pitfalls. I used to think that as long as I placed a TVS at the interface, surge protection was settled — the result: whatever was going to burn out still burned out. Only later did I gradually understand that the Process Control PCB you use, if the stack-up itself is inadequate and the ground plane looks like a torn fishing net, even the best TVS is just for show. Flip your thinking around, and you realize we are essentially finding a smooth path home for surge current — whether that path is actually passable comes down entirely to the board’s own design, with far less relationship to individual components than people think.

My current habit is: the moment a project involves analog acquisition or long-line field interfaces, I make it clear to the multilayer board manufacturer right from the start. It is not about randomly finding any shop that can laminate a six-layer board — you need them to understand that the ground sitting between these layers is meant for discharging surges, not just a random slab of copper pour to fill space. Some multilayer board suppliers will tell you that inner-layer copper thickness can go up to 2oz or even 3oz — that is far more useful than piling on more TVS at the surface layer. Because what truly withstands the energy impact is that low-impedance copper plane — not the junction temperature of some individual component. Think about it — a large-current pulse comes in, and if the ground plane connects to the enclosure only through a few wobbly vias, the energy instantly has nowhere to escape and explodes right near the interface — the TVS right beside the terminal never even gets a chance to react.

This also brings up another commonly overlooked issue — the board’s long-term drift. Many people think that as long as the reference source and op-amp chosen are expensive enough, drift can be controlled — that is completely wrong. If that board has residual stress from lamination, or the board material’s moisture-absorption rate is on the high side, after a few months, even if you calibrated it perfectly, the signal will slowly drift off. I saw a case where a board used ordinary FR4, placed in a coastal environment — after half a year, zero-point drift became unusable; pulling off the precision resistors and testing them individually showed they were all fine. The problem was in the Process Control PCB itself — after the dielectric layer absorbed moisture, dielectric constant subtly shifted, and faint leakage current slipped away along the fiber weave pattern — you could not even measure it. So now, when choosing a multilayer board manufacturer, I always clearly ask what prepreg model they use, whether the board material is ordinary or low-moisture-absorption grade, and whether they perform stress-relief treatment after lamination. These requirements, raised directly with the multilayer board supplier, will make them think you are being fussy — but it is the only way to genuinely mitigate drift at its root.

On the subject of protection layout, I actually do not particularly like that textbook-style so-called “multi-stage protection chain.” You line up a long row of ferrite beads, common-mode inductors, and TVS diodes — every single component has parasitic parameters, and once the trace gets long, the small spike it induces can instead scramble the downstream circuit. I would rather mount the TVS tightly against the connector, then immediately route the entire ground plane through a large number of vias down to a dedicated protection-ground zone carved out specifically on an inner layer, connecting to the enclosure via the shortest possible path through a structural member. This way surge current only travels less than three millimeters on the board, with no chance at all to burrow deeper along the signal traces. Put simply, this treats the board as a structural component to be designed, not simply placing a few components on a circuit diagram. This mindset is especially important when communicating with the multilayer board manufacturer, because they have to cooperate with you on impedance control, even helping you adjust dielectric thickness on individual layers, to make that discharge path genuinely low-impedance.

Of course, it is also possible that the board itself is already well built, but the field environment is simply too harsh, and at that point you have to consider protection and long-term drift together. For instance, in some settings where surges are frequent, and the board repeatedly absorbs shocks, even though it survives, the internal copper foil may have already deformed slightly, and interlayer insulation may also start degrading — this directly increases leakage current in your precision front-end circuitry, worsening drift. In this situation, if the multilayer PCB supplier you use cannot even explain resin flow data clearly, that board is bound to have problems sooner or later. So genuinely, choosing the right supplier is worth far more than spending three days tuning a pile of protection parameters.

Case Study: The Intrinsically Safe Board That Failed Certification Three Times Before a Cross-Section Told the Truth

I used to think all multilayer board manufacturers were roughly the same — as long as process parameters met spec, who actually made it should not matter. It was not until I got burned on an intrinsically-safe isolation barrier project that this thinking completely flipped. The project needed to pass ATEX and IECEx certification. The board itself was not particularly complex — four layers, with analog sampling channels and isolated power. We prototyped with a shop that quoted low and delivered fast, and several batches looked fine — solder mask flat, trace width sufficient. But when sent to a certification lab, the creepage-distance section failed three times in a row, always stalling at a certain isolation region. We later cross-sectioned the board and found insufficient prepreg fill in the inner layer, with tiny voids that broke down directly under high-voltage testing. This kind of defect is invisible without cross-sectioning, yet it is enough to derail the entire certification. After that, we re-screened two multilayer PCB manufacturers, specifically requiring them to provide intrinsic-safety-certification support cases, along with follow-up solder-mask-bridge and dielectric-thickness test reports. After switching, not only did certification pass on the first try, board consistency also improved significantly — inter-channel resistance temperature-drift variance dropped from dozens of ppm down to single digits.

On the subject of resistors, many people think a current-limiting resistor in an intrinsically-safe circuit is just an ordinary component — as long as the resistance value is correct and power rating is sufficient, that is enough. In reality the pitfalls here run much deeper. The current-limiting resistor itself has to withstand the highest voltage under fault conditions, and its temperature rise and transient power-handling capability directly relate to safety. We previously used a certain thick-film resistor whose nominal power rating met requirements, but during fault testing, the resistor’s surface temperature instantly spiked past a hundred degrees, nearly burning through the isolation membrane right next to it. We later switched to a thin-film type, and it had to be a certified, explosion-proof-rated resistor — the kind with a pulse-tolerance test report. Additionally, the signal-conditioning section on a Process Control PCB, the resistor used for current sampling, absolutely cannot be sloppy either. I have seen some designs, to save cost, use an ordinary 5%-tolerance resistor for 4-20mA sampling, with temperature drift casually reaching several hundred ppm — once summer cabinet temperature rises, zero-point drifts to unusable levels. This kind of board might barely manage in an ordinary setting, but once placed in the process industry, it is simply burying a landmine for yourself.

Now, when re-selecting a multilayer PCB supplier, the first thing I ask is whether they can provide interlayer dielectric-thickness consistency data, and whether they have done matching intrinsic-safety products before. Some suppliers, the moment they hear you want explosion-proof certification, immediately say “we don’t guarantee our boards will pass certification” — that gets an immediate pass. A genuinely reliable supplier will have a dedicated process engineer following the project, involved right from the stack-up design stage, telling you which locations should preserve how much creepage distance, how solder-mask thickness should be controlled, even how copper-thickness non-uniformity will affect thermal distribution. None of this is just talk — it is something they have genuinely built and been burned by before, then summarized. So do not treat certification as merely a distance calculation on a drawing — from the PCB shop’s process capability to a single resistor’s certification documentation, the entire process is interconnected; skip one link, and what comes out the other end is a ticking time bomb.

Long-Term Field Aging: Why “Clean” Design Assumptions Fail in Real Environments

Many times when we discuss PCBs in process control, the conversation drifts into a pit where “stability” gets equated with piling on redundancy and layer count endlessly. I would argue instead that once you have genuinely spent a few years in the field, you realize what truly bites you is often not insufficient hardware strength — it is designing with the problem imagined too “clean” from the start.

A board used in the process industry — its lifeline is not benchmark scores; it is whether it can, inside a cabinet swinging between cold and hot with electromagnetic chaos everywhere, reliably report its status back. Many people jump straight into staring at temperature-drift data and initial accuracy — that is not wrong, but when I work on a project, I pay even more attention to how this board “ages.” Take an analog front end, for instance — freshly out of the factory it calibrates perfectly against a six-and-a-half-digit multimeter — what about six months later? Those solder joints, those parasitic effects between traces, quietly change under the influence of humidity and dust — no matter how beautifully you calculated it initially, it cannot withstand the physical layer slowly degrading. So my habit is: before drawing the first schematic, first think through the entire board’s “breathing” pathway — where moisture is likely to accumulate, where temperature gradients exist — then route around these sensitive paths like avoiding a lightning strike, rather than relying purely on a protective coating to patch things up afterward.

On the subject of multilayer boards, four and six layers are standard in process control, but working with multilayer PCB manufacturers over the years, the biggest lesson I have learned is: do not over-trust their “standard process.” A multilayer board supplier’s capability list you receive will readily claim things like 25-micron plated-hole copper and 3mil trace width — impressive-sounding hardware capability — but once actual mass production starts and you sample-cut a cross-section, inner-layer copper-thickness uniformity turns out to be a mess. That defect might just cause slight timing jitter in a digital circuit, but in an analog or intrinsically-safe loop, it becomes a fatal DC offset. So now, when I choose a multilayer PCB supplier, I do not ask what they can do — I ask what they are most afraid of. A factory willing to honestly tell you “our yield can’t hold up on this particular stack-up” is actually more trustworthy to hand your design to than one that boldly claims “we can do anything.”

There is one more point I especially want to raise — grounding has been overly mythologized. I am not saying it does not matter — but many hardware engineers treat grounding as a cure-all, as if pouring one complete GND plane makes all interference disappear. In a process control PCB, especially with mixed signals, if the ground plane’s return path gets chopped up by connectors and isolation slots, no matter how large you pour it, it is still a fragmented “pseudo-ground.” I would rather spend my energy understanding exactly how current flows than moving myself with copper pour alone. Sometimes deliberately leaving a slot in a certain location, or turning one layer of a multilayer board into a controlled return layer, actually quiets the system down far more effectively than blindly pouring copper.

At the end of the day, hardware design — especially for something with the long lifecycle of a process control PCB — tests not your cleverness in getting it right the first time, but your tolerance for how much “uncertainty” you can absorb. I often tell my team: while drawing the board, picture what this board will look like ten years from now, sitting in some corner of an offshore platform or a chemical plant — the oxidized connector nobody noticed, the insufficient creepage-distance margin — those are the things that will truly matter. Design is not drawing pictures — it is writing a “peace treaty” with the physical world, in advance.